Firewing

Hello,

I would like to put the processor in SLEEP, and to wake up on PIN change.

I defined the pins for interrupt in CNE1 and CNE2 registers.

How to put it to sleep, and how to write the interrupt subroutine?

I've used this in the past...

Code: Select all

interrupt OnKeypress(Pic.INT1Interrupt)
   IFS1.4 = 0
end interrupt

sub OnStartup() handles Pic.OnStartup

   ' keypress ISR...
   RPINR0 = RPINR0 and &HE0FF  ' set RP0 to external interrupt 1 (bits 8..12)
   INTCON2 = 0                 ' set INT0, INT1, INT2, interupt on falling edge
   IFS1.4 = 0                  ' reset INT1 interrupt flag
   IPC5 = IPC5 and &HFFF8 or 1 ' set low priority
   enable(OnKeypress)
   
   ' sleep... 
   low(D11)
   asm
   pwrsav #0
   end asm 
end sub


and to go to sleep...

Code: Select all

   asm
   reset
   end asm

I tried that, MCU goes to sleep but it never weaks up.

Here is what I have:

7 buttons connected directly to input pins of MCU. I have Used internal pull-ups for all of them, also map them for interrupt on change:

Code: Select all

   CNPU1=$0700       'Enable pull-ups
   CNPU2=$1604       
   
   CNEN1=$0700       'Enable butoons interrupts
   CNEN2=$1604

So all I want is when I press any of the buttons, to wake up the MCU.

Based on my setup what would you suggest?

Thanks!

You have to set RPINR0 if using INT1 or RPINR1 if using INT2 to define the source pin of your interrupt on change. Note that you can only assign INT1 or INT2 to a single pin...

...to wake up on PIN change

If you want to use the Input Change Notification feature (to monitor multiple pins), then I think you want to use the CN interrupt.

In addition to setting up CNEN1/CNEN2 and CNPU1/CNPU2 to match the bits you want to use, you'll need to setup
interrupt enable reg IEC1.3 (CNIE) and monitor/clear interrupt flag status reg IFS1.3 (CNIF)

Also, make sure the intr priority setting for IPC4.CNIP<2:0> is set to match what you want to do...

If the assigned priority level of the CN interrupt is equal to, or less than, the current CPU priority
level, device execution continues from the instruction immediately following the SLEEP or IDLE
instruction.
If the assigned priority level of the CN interrupt is greater than the current CPU priority level,
device execution continues from the CN interrupt vector address.

The isr (if used) would look something like

Code: Select all

interrupt OnInputChange(Pic.CNInterrupt)
   ' read pins to clear mismatch
   ' clear intr flag
   IFS1.3 = 0
end interrupt


Thanks Jerry,

your approach works great!

This was exactly what I wanted!